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[VHDL-FPGA-Verilog] DDRSDRAMControllerverilogcode

Description: 这个设计是使用Virtex-4实现DDR的控制器的，设计分为三个主要模块：Front-End FIFOs,DDR SDRAM Controller和Datapath Module。其中主要是DDR SDRAM Controller,当然还有测试模块。-This design is the use of Virtex-4 implementation of the DDR controller, the design is divided into three main modules: Front-End FIFOs, DDR SDRAM Controller and Datapath Module. Are one of the main DDR SDRAM Controller, of course, have the test module.
Platform: | Size: 477184 | Author: fdasfds | Hits:

[VHDL-FPGA-Verilog] SDRAM

Description: 这个是一个基于FPGA的SDRAM控制器系统，实现对SDRAM的读写操作，用来实现时序的控制-This is an FPGA-based SDRAM controller system, the read and write operations to SDRAM to achieve the control of timing
Platform: | Size: 2171904 | Author: jyb | Hits:

[VHDL-FPGA-Verilog] sdramctrl

Description: sdram controller vhdl
Platform: | Size: 15360 | Author: wangxiaolong | Hits:

[VHDL-FPGA-Verilog] sdramctrl2

Description: sdram controller 2 vhdl
Platform: | Size: 15360 | Author: wangxiaolong | Hits:

[VHDL-FPGA-Verilog] VerilogfoFPGAbasedSDRAMController

Description: 使用Verilog实现基于FPGA的SDRAM控制器-The use of Verilog for FPGA-based SDRAM Controller
Platform: | Size: 1680384 | Author: he | Hits:

[Embeded-SCM Develop] hssdrc_latest

Description: SDRAM 控制器 Verilog实现，很有借鉴意义。-SDRAM controller core Verilog implementation。With good referential significance.
Platform: | Size: 424960 | Author: metallica | Hits:

[VHDL-FPGA-Verilog] SDRAM_VerilogCode

Description: 基于FPGA的SDRAM控制器Verilog代码，开发环境为Quartus6.1，控制SDRAM实现对同一片地址先写后读。-FPGA-based SDRAM controller Verilog code, development environment for Quartus6.1, control of SDRAM to achieve the same address one after the first time to write.
Platform: | Size: 26624 | Author: 姜琰俊 | Hits:

[VHDL-FPGA-Verilog] sdram_controller

Description: It s a SDRAM Controller reference design. It had been tested in many projects.
Platform: | Size: 466944 | Author: greyzhuang | Hits:

[VHDL-FPGA-Verilog] SDRAMcontrollor

Description: SDRAM控制器，以下是我用VHDL编写SDRAM Controller的全部资料。文档提供的SDRAM控制器能工作在125MHz，我在实际工程中用到了120MHz，但没有再往上做测试了-SDRAM controller, the following is my SDRAM Controller using VHDL to prepare all the information. Documentation provided by SDRAM controller can work in the 125MHz, I used in the actual works of 120MHz, but did not do test in 125MHz or more
Platform: | Size: 6203392 | Author: 何宗奎 | Hits:

[VHDL-FPGA-Verilog] WRCTRL

Description: this VHDL Program get a 64 bit data and send it to a SDRAM-controller block to write into SDRAM and then get a 64bits data from SDR-block
Platform: | Size: 2048 | Author: Taher Aghazadeh | Hits:

[VHDL-FPGA-Verilog] SDRAM

Description: 瑞芯科技EFX400SL开发板上使用ISE创建的SDRAM控制器的工程源码-Rockchip EFX400SL technology development board created by the use of ISE projects SDRAM controller source
Platform: | Size: 13446144 | Author: 曹晶 | Hits:

[VHDL-FPGA-Verilog] SDRAM_controller

Description: Simple SDRAM Controller.
Platform: | Size: 3072 | Author: vasil | Hits:

[VHDL-FPGA-Verilog] sdram_ver_134

Description: This code is a SDRAM Controller IP Core for FPGA to interface with SDRAM Memory. This code is based Xilinx FPGA Playform.
Platform: | Size: 108544 | Author: peace | Hits:

[File Format] Sdram_Control_4Port

Description: 4 multi port sdram controller
Platform: | Size: 357376 | Author: waters | Hits:

[VHDL-FPGA-Verilog] sdram-control-verilog

Description: SDRAM控制器源码，内含完整的控制器verilog源代码和测试代码，超值哈。-This readme file for the SDR SDRAM Controller includes information that was not incorporated into the SDR SDRAM Controller White Paper v1.1.
Platform: | Size: 991232 | Author: runxin | Hits:

[VHDL-FPGA-Verilog] sdram

Description: SDRAM驱动器，自己项目利用的，已经经过实际验证-sdram controller
Platform: | Size: 4096 | Author: 田云钧 | Hits:

[Other Embeded program] ddr_sdram_controller

Description: DDR SDRAM Controller design
Platform: | Size: 2400256 | Author: Jerry | Hits:

[VHDL-FPGA-Verilog] AMBA

Description: 基于AMBA总线的DDR2 SDRAM控制器研究与实现-AMBA bus-based Research and Implementation of DDR2 SDRAM Controller
Platform: | Size: 209920 | Author: guoxiaojin | Hits:

[VHDL-FPGA-Verilog] ref-sdr-sdram-verilog

Description: SDRAM控制器，使用verilog编写-SDRAM controller, use the write verilog
Platform: | Size: 776192 | Author: yangbo | Hits:

[Software Engineering] ddr_sdr_V1_1

Description: its the vhdl stuff for ddr sdram controller nice one easily understandable-its the vhdl stuff for ddr sdram controller nice one easily understandable
Platform: | Size: 37888 | Author: james | Hits:
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